MAX9476

Low-Jitter, 8kHz Reference Clock Synthesizer Outputs 35.328MHz

Clock Generator is Optimized for xDSL CO Line Cards and Telecom Systems Requiring Low-Jitter Clock Outputs

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Status Explanations for product status codes

All versions are Not Recommended for New Designs.

Description

The MAX9476 low-cost, high-performance clock synthesizer with an 8kHz input reference clock provides six buffered LVTTL clock outputs at 35.328MHz. The clock synthesizer can be used to generate the clocks for systems using T1, E1, T3, E3, and xDSL.

The MAX9476 features a phase-lock loop (PLL) that uses a voltage-controlled crystal oscillator (VCXO). The internal PLL phase locks the external crystal (35.328MHz) to the 8kHz input reference clock. In addition, this device generates a jitter-suppressed output that provides a better source for the reference clock relay.

The MAX9476 is available in a 24-pin TSSOP package and operates over the extended operating temperature range of -40°C to +85°C and a single +3V to +3.6V power-supply range. For using lower value external crystals, refer to the MAX9486 data sheet.
 

Data Sheet

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Key Features

  • 8kHz Input-Reference CLK
  • 4psRMS (typ) Output Jitter
  • High-Jitter Rejection on the Reference CLK
  • Synthesizer Locks to the 8kHz Reference with a ±100ppm Range
  • Output Frequency: 35.328MHz
  • Six Buffered LVTTL Low-Jitter Outputs
  • One 8kHz Reference CLK Relay Output
  • +3.3V Supply Operation
  • 24-Pin TSSOP Package
 

Applications/Uses

  • Telecom Equipment Using T1, E1, T3, E3, and ISDN Protocols
  • xDSL Equipment in CO with Interface to the Telecom Protocols
   

Diagram

MAX9476: Typical Application Circuit
Typical Application Circuit

More Information

New Product Press Release 2005-02-22 ]

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Document Ref.: 19-3530 Rev 0; 2005-02-03
This page last modified: 2007-07-25




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