DS26556

4-Port Cell/Packet Over T1/E1/J1 Transceiver

4-Port Cell/Packet Over T1/E1/J1 Single-Chip Transceiver

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Status Explanations for product status codes

Active: In Production.

Description

The DS26556 is a quad, software-selectable T1, E1, or J1 transceiver with a cell/packet/TDM interface. It is composed of four framer/formatters + LIUs, and a UTOPIA (cell), POS-PHY™ (packet), and TDM backplane interface. Each framer has an HDLC controller that can be mapped to any DS0 or FDL (T1)/Sa (E1) bit. The DS26556 also includes full-featured BERT devices per port, and an internal clock adapter useful for creating synchronous, high-frequency backplane timing. The DS26556 is controlled through an 8-bit parallel port that can be configured for nonmultiplexed Intel or Motorola operation.
 

Data Sheet

Download this datasheet in PDF formatDownload Rev 2 (PDF, 2.1MB)
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Errata DS26556 26556A1.pdf

Key Features

  • Four Independent, Full-Featured T1/E1/J1 Transceivers
  • UTOPIA 2 and 3 Cell Interface
  • POS-PHY 2 and 3 Packet Interface
  • TDM Backplane Supports TDM Bus Rates from 1.544MHz to 16.384MHz
  • Alarm Detection and Insertion
  • Full-Featured BERT for Each Port
  • AMI, B8ZS, HDB3, NRZ Line Coding
  • Transmit Synchronizer
  • BOC Message Controller (T1)
  • One HDLC Controller per Framer
  • Performance Monitor Counters
  • RAI-CI and AIS-CI Support
  • Internal Clock Generator (CLAD) Supplies 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz
  • JTAG Test Port
  • Single 3.3V Supply with 5V Tolerant Inputs
  • 17mm x 17mm, 256-Pin BGA (1.00mm Pitch)
 

Applications/Uses

  • Add/Drop Multiplexers
  • Automated Teller Machines
  • Central Office Equipment
  • Customer-Premise Equipment
  • DSLAMs
  • IMA
  • PBXs
  • Routers
  • Switches
  • VoIP
  • WAN Interface
   

Key Specifications:

T/E Carrier & Packetized Products
Part Number Transmission Standard Functions Channels In-to-Out Clocks
(MHz)
VSUPPLY
(V)
Package/Pins Smallest Available Pckg.
(mm2)
Budgetary Price
max w/pins See Notes
DS26556  T1/E1/J1 Framer + LIU 4 External Master Clock can be a multiple of 1.544 or 2.048 3.3
CSBGA/256
289 $45.32 @1k
See All T/E Carrier & Packetized Products (100)
Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.


Diagram

DS26556: Block Diagram
Block Diagram

More Information

New Product Press Release 2005-02-15 ]

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Description
Key Features
Applications/Uses
Key Specifications
Diagram
Notes and Comments
  Data Sheet
Errata
Application Notes
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Rev 2; 2007-12-17
This page last modified: 2009-10-07




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