DS26528 Octal T1/E1/J1 Transceiver

Overview

Technical Documents

Ordering Info

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Status Active: In Production.

Data Sheet Download Rev 9 (PDF, 1.9MB) E-Mail Errata DS26528 26528A1.pdf Errata DS26528 26528A2.pdf Errata DS26528 26528A3.pdf Errata DS26528 26528A4.pdf

Application Notes

Application Note 301		Legacy T1/E1 8MHz Backplane Operation
Application Note 309		Interfacing to the Fractional T1 and E1
Application Note 351		T1/E1 and T3/E3 Transformer Selection Guide
Application Note 390		DS31256 and T1/E1 Interface
Application Note 561		Tech Brief 7: DS2152 and DS2154 8MHz System Clock Operation
Application Note 3208		Elastic Store Operation
Application Note 3345		Examples of DS31256 Applications
Application Note 3610		DS21458 Quad and DS26528 Octal Transceiver Software Comparison
Application Note 3686		DS2155 and DS26521 Software Comparison
Application Note 3718		DS26528 and DS26524 Transmit Pulse Control
Application Note 3827		Initialization and Configuration of the DS26528 Transceiver
Application Note 3968		How to Use the Bit-Error-Rate Tester (BERT) on the DS2652x STCs

Product Guides

Communications (PDF)

Reliability Reports

Reliability Report:

DS26528.pdf

Software/Models

DS26528 Cadence Allegro Symbol

DS26528 Cadence Concept Symbol

DS26528 IBIS Model

DS26528 Logical Symbol-XML Format

DS26528CSBGA A2 BSDL Model

DS26528CSBGA A3 BSDL Model

DS26528CSBGA A4 BSDL Model

DS26528LBGA A3 BSDL Model

DS26528LBGA A2 BSDL Model

DS26528LBGA A4 BSDL Model

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Information Index

Rev 9; 2007-12-05
This page last modified: 2009-10-07