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DS2156, DS2156L, DS2156LN
T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
Industry's First T1/E1/J1 Transceiver for ATM Applications
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Status
Active: In Production.
Description
The DS2156 is a software-selectable T1, E1, or J1 single-chip transceiver (SCT) for short-haul and long-haul applications. The backplane is user-configurable for a TDM or UTOPIA II bus interface. The DS2156 is composed of a line interface unit (LIU), framer, HDLC controllers, and a UTOPIA/TDM backplane interface, and is controlled by an 8-bit parallel port configured for Intel or Motorola bus operations. The DS2156 is pin and software compatible with the DS2155.
The LIU is composed of transmit and receive interfaces and a jitter attenuator. The transmit interface is responsible for generating the necessary waveshapes for driving the network and providing the correct source impedance depending on the type of media used. T1 waveform generation includes DSX-1 line buildouts as well as CSU line buildouts of -7.5dB, -15dB, and -22.5dB. E1 waveform generation includes G.703 waveshapes for both 75Ω coax and 120Ω twisted cables. The receive interface provides network termination and recovers clock and data from the network.
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Data Sheet
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An evaluation kit is available: DS2155DK, DS2156DK
Key Features
- Complete T1/DS1/ISDN-PRI/J1 transceiver functionality
- Complete E1 (CEPT) PCM-30/ISDN-PRI transceiver functionality
- User-selectable TDM or UTOPIA II bus interface
- Long-haul and short-haul line interface for clock/data recovery and waveshaping
- CMI coder/decoder for optical I/F
- Crystal-less jitter attenuator
- Fully independent transmit and receive functionality
- Dual HDLC controllers
- Programmable BERT generator and detector
- Internal software-selectable receive and transmit-side termination resistors for 75Ω/100Ω/120Ω T1 and E1 interfaces
- Dual two-frame elastic-store slip buffers that connect to asynchronous backplanes up to 16.384MHz
- 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz clock output synthesized to recovered network clock
- Additional features listed in full data sheet
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Applications/Uses
- Add/Drop Multiplexers
- Inverse Mux ATM (IMA)
- Routers/Switches
- T1/E1/J1 Line Cards
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Key Specifications:
| T/E Carrier & Packetized Products |
| Part Number |
Transmission Standard |
Functions |
Channels |
In-to-Out Clocks
(MHz) |
VSUPPLY
(V) |
EV Kit |
Package/Pins |
Smallest Available Pckg.
(mm2) |
Budgetary Price |
| max w/pins |
See Notes |
| DS2156 |
T1/E1/J1 |
Framer + LIU |
1 |
External Master Clock can be a multiple of 1.544 or 2.048 |
3.3 |
Yes |
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100 |
$18.54 @1k |
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See All T/E Carrier & Packetized Products (100)
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Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.
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Diagram
Block Diagram
Notes and Comments
The DS2156 connects directly to a UTOPIA II packetized backplane and performs the conversion between UTOPIA packet and TDM data streams. The backplane interface can be configured for UTOPIA II or TDM. The LIU and framer provide a true software-only configuration for connection to a T1, E1, or J1 line. The DS2156 conforms to all T1, E1, and J1 framing, synchronization, and transmission modes. It also supports all standard alarm generation and monitoring functions.
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Information Index
Rev 3;
2006-01-23
This page last modified: 2009-10-14
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