DS21Q43A

Quad E1 Framer

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Active: In Production.

Description

The DS21Q43A combines four of the popular DS2143 E1 controllers onto a single monolithic die. The "A" designation denotes that some new features are available in the quad version that were not available in the single E1 device. The added features in the DS21Q43A are listed in Section 1. The DS21Q43A offers a substantial space savings to applications that require more than one E1 framer on a card. The quad version is only slightly bigger than the single E1 device. All four framers in the DS21Q43A are totally independent; they do not share a common framing synchronizer. Also, the transmit and receive sides of each framer are totally independent. The dual two-frame elastic stores contained in each of the four framers can be independently enabled and disabled as required. The DS21Q43A meets all of the latest specifications, including CCITT/ITU G.704, G.706, G.962, and I.431 as well as ETS 300 011 and ETS 300 233.
 

Data Sheet

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Key Features

  • Four E1(CEPT or PCM-30)/ISDN-PRI framing transceivers
  • All four framers are fully independent; transmit and receive sections of each framer are fully independent
  • Frames to FAS, CAS, CCS, and CRC4 formats
  • 8-bit parallel control port that can be connected to either multiplexed or nonmultiplexed buses
  • Each of the four framers contains dual two-frame elastic stores that can connect to asynchronous or synchronous backplanes up to 8.192MHz
  • Easy access to Si and Sa bits
  • Extracts and inserts CAS signaling
  • Large counters for bipolar and code violations, CRC4 code word errors, FAS word errors, and E-bits
  • Programmable output clocks for fractional E1, per channel loopback, H0 and H12 applications
  • Detects and generates AIS, remote alarm, and remote multiframe alarms
  • Pin-compatible with DS21Q41B quad T1 framer
  • 5V supply; low power CMOS
  • Available in 128-pin TQFP
  • Industrial (-40°C to +85°C) grade version available (DS21Q43ATN)
   
   

Diagram

DS21Q43A: Functional Diagram
Functional Diagram

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Rev 1; 1999-09-22
This page last modified: 2009-10-22




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