The avalanche photodiode detector (APD) is used as a receiver in optical communications, as is the pin diode. The APD is more sensitive, but it must be biased properly to produce the appropriate electron flow for a given flux of photons. In Figure 1, an external digital-to-analog converter enables dynamic, computer-controlled adjustment of an APD bias generator.
Figure 1. This APD-bias generator produces a regulated, computer-adjusted output in the 30V to 70V range.
To generate the bias voltage
VOUT, a boost converter (IC1, L1, and Q1) drives a diode-capacitor charge pump (D3/C4, D2/C3, and D1/C5). IC1 regulates VOUT with respect to a set point established by the external control voltage VDAC: As VDAC ranges from 2V to zero, VOUT varies from 28V to about 71V (Figure 2).
At 70V with a 0.5mA output current, the limitation on ripple is typically 0.5V (max) (0.7%). The circuit shown produces less than 0.3% ripple at 1mA, and its maximum output current is about 3mA. The output capacitor (C5) should be a low-ESR type.
Figure 2. The DC-output level in Figure 1 is a linear function of the control-voltage VDAC.
A similar idea appeared in the May 22, 1997 issue of EDN.
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