Abstract: The DS1865 burst-mode PON controller with integrated monitoring provides programming options required to configure the alarms, warnings, lookup tables, and other functions detailed in Application Note 4052, Quick Reference Guide to the DS1863 Memory Map. This programmability necessitates a large register memory map. This application note provides an alternate outline of the register map, which is convenient when programming the device. Introduction The DS1865 is a burst-mode PON controller with integrated monitoring capabilities. It features seven separate memory tables that are internally organized into eight byte rows. In addition this controller has auxiliary memory, which is EEPROM accessible at the A0h slave address. Memory Map of the DS1865 The Lower Memory is addressed from 00h to 7Fh. This memory contains alarm and warning thresholds, flags, masks, several control registers, password entry area (PWE), and the Table Select byte. See Figure 1. Table 01h primarily contains EEPROM (with PW1-level access) and some alarm and warning status bytes. Table 02h is a multifunction space that contains configuration registers, scaling and offset values, passwords, interrupt registers, and other miscellaneous control bytes. Table 03h is strictly EEPROM that is protected by a PW2-level password. Table 04h contains a temperature-indexed lookup table (LUT) for controlling the modulation voltage. The modulation LUT can be programmed in 2°C increments over the -40°C to +102°C range. Access to this LUT is protected by a PW2-level password. Table 05h contains another LUT which allows the APC set point to change as a function of temperature to compensate for Tracking Error (TE). The TE LUT has 36 entries that determine the APC setting in 4°C windows between -40°C to +100°C. Access to this LUT is protected by a PW2-level password. Table 06h contains a MON4-indexed LUT for controlling the M4DAC voltage. The M4DAC LUT has 32 entries that are configurable to act as one 32-entry LUT or two 16-entry LUTs. When configured as one 32-entry LUT, each entry corresponds to an increment of 1/32 of the full scale. When configured as two 16-entry LUTs, the first 16 entries and the last 16 entries each correspond to 1/16 of full scale. Either of the two 16-entry sections is selected with a separate configuration bit. Access to this LUT is protected by a PW2-level password. Figure 1. DS1865 memory map. Register Reference The following tables provide an easy reference to the Lower Memory, and Tables 01h and 02h. For a description of the functionality for each bit, please refer to the corresponding register in the DS1865 data sheet. Tables 03h, 04h, 05h, and 08h are LUTs that do not require a separate reference, and thus are not included here. (Please refer to the data sheet for detailed information about these tables.) Note: RSVD is used as an acronym for Reserved. Lower Memory Table TEMP ALARM HI TEMP WARN HI 00h, 04h S 26 25 24 23 22 21 20 01h, 05h 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 TEMP ALARM LO TEMP WARN LO 02h, 06h S 26 25 24 23 22 21 20 03h, 07h 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 VCC ALARM HI VCC WARN HI 08, 0C, 10, 14, 18, 1C, 20, 24, 25, 2Ch 215 214 213 212 211 210 29 28 MON1-4 ALARM HI MON1-4 WARN HI 09, 0D, 11, 15, 19, 1D, 21, 25, 29, 2Dh 27 26 25 24 23 22 21 20 VCC ALARM LO VCC WARN LO 0A, 0E, 12, 16, 1A, 1E, 22, 26, 2A, 2Eh 215 214 213 212 211 210 29 28 MON1-4 ALARM LO MON1-4 WARN LO 0B, 0F, 13, 17, 1B, 1F, 23, 27, 2B, 2Fh 27 26 25 24 23 22 21 20 PW2 EE 30h-5Fh EE EE EE EE EE EE EE EE TEMP VALUE 60h S 26 25 24 23 22 21 20 61h 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 VCC VALUE, MON1-4 VALUE 62, 64, 66, 68, 6Ah 215 214 213 212 211 210 29 28 63, 65, 67, 69. 6Bh 27 26 25 24 23 22 21 20 RESERVED 6C, 6Dh 0 0 0 0 0 0 0 0 STATUS 6Eh FETG STATUS SOFT FETG RSVD TX-F RESET SOFT TX-D TX-F STATUS LOS STATUS RDYB UPDATE 6Fh TEMP RDY VCC RDY MON1 RDY MON2 RDY MON3 RDY MON4 RDY RSVD RSVD ALARM3 70h TEMP HI TEMP LO VCC HI VCC LO MON1 HI MON1 LO MON2 HI MON2 LO ALARM2 71h MON3 HI MON3 LO MON4 HI MON4 LO RSVD RSVD RSVD RSVD ALARM1 72h RSVD RSVD RSVD RSVD BIAS HI RSVD TX-P HI TX-P LO ALARM0 73h RSVD RSVD RSVD RSVD BIAS MAX RSVD RSVD RSVD WARN3 74h TEMP HI TEMP LO VCC HI VCC LO MON1 HI MON1 LO MON2 HI MON2 LO WARN2 75h MON3 HI MON3 LO MON4 HI MON4 LO RSVD RSVD RSVD RSVD RESERVED 76, 77h 0 0 0 0 0 0 0 0 DOUT 78h RSVD RSVD RSVD RSVD D3 OUT D2 OUT D1 OUT D0 OUT DIN 79h RSVD RSVD INV LOSI MUX LOSI D3 IN D2 IN D1 IN D0 IN RESERVED 7Ah 0 0 0 0 0 0 0 0 PASSWORD ENTRY 7Bh 231 230 229 228 227 226 225 224 7Ch 223 222 221 220 219 218 217 216 7Dh 215 214 213 212 211 210 29 28 7Eh 27 26 25 24 23 22 21 20 TABLE SELECT 7Fh 27 26 25 24 23 22 21 20 TABLE 01h PW1 EEPROM 80h–F7h EE EE EE EE EE EE EE EE ALARM3 F8h TEMP HI TEMP LO VCC HI VCC LO MON1 HI MON1 LO MON2 HI MON2 LO ALARM2 F9h MON3 HI MON3 LO MON4 HI MON4 LO RSVD RSVD RSVD RSVD ALARM1 FAh RSVD RSVD RSVD RSVD BIAS HI RSVD TX-P HI TX-P LO ALARM0 FBh RSVD RSVD RSVD RSVD BIAS MAX RSVD RSVD RSVD WARN3 FCh TEMP HI TEMP LO VCC HI VCC LO MON1 HI MON1 LO MON2 HI MON2 LO WARN2 FDh MON3 HI MON3 LO MON4 HI MON4 LO RSVD RSVD RSVD RSVD RESERVED FE-FFh 0 0 0 0 0 0 0 0 TABLE 02h MODE 80h SEEB RSVD RSVD M4DAC-EN AEN MOD-EN APC-EN BIAS-EN T INDEX 81h 27 26 25 24 23 22 21 20 MOD DAC 82h 27 26 25 24 23 22 21 20 APC DAC 83h 27 26 25 24 23 22 21 20 V INDEX 84h 27 26 25 24 23 22 21 20 M4DAC 85h 27 26 25 24 23 22 21 20 DEVICE ID 86h 0 1 1 0 0 1 0 1 DEVICE VER 87h DEVICE VERSION UPDATE RATE 88h 0 0 0 0 SR3 SR2 SR1 SR0 CONFIG 89h FETG DIR TX-F EN RSVD ASEL RSVD RSVD RSVD RSVD START-UP STEP 8Ah 212 211 210 29 28 27 26 25 MOD RANGING 8Bh RSVD RSVD RSVD RSVD RSVD MOD2 MOD1 MOD0 DEVICE ADDRESS 8Ch 27 26 25 24 23 22 21 20 COMP RANGING 8Dh RSVD BIAS2 BIAS1 BIAS0 RSVD APC2 APC1 APC0 RIGHT SHIFT1 8Eh RSVD MON12 MON11 MON10 RSVD MON22 MON21 MON20 RIGHT SHIFT0 8Fh RSVD MON32 MON31 MON30 RSVD MON42 MON41 MON40 RESERVED 90–91h 0 0 0 0 0 0 0 0 VCC SCALE MON1-4 SCALE 92, 94, 96, 98, 9Ah 215 214 213 212 211 210 29 28 93, 95, 97, 99, 9Bh 27 26 25 24 23 22 21 20 RESERVED 9C–A1h 0 0 0 0 0 0 0 0 VCC OFFSET MON1-4 OFFSET A2, A4, A6, A8, AAh S S 215 214 213 212 211 210 A3, A5, A7, A9, ABh 29 28 27 26 25 24 23 22 RESERVED AC-ADh 0 0 0 0 0 0 0 0 TEMP OFFSET AEh S 28 27 26 25 24 23 22 AFh 21 20 2-1 2-2 2-3 2-4 2-5 2-6 PW1 B0h 231 230 229 228 227 226 225 224 B1h 223 222 221 220 219 218 217 216 B2h 215 214 213 212 211 210 29 28 B3h 27 26 25 24 23 22 21 20 PW2 B4h 231 230 229 228 227 226 225 224 B5h 223 222 221 220 219 218 217 216 B6h 215 214 213 212 211 210 29 28 B7h 27 26 25 24 23 22 21 20 FETG ENABLE1 B8h TEMP EN VCC EN MON1 EN MON2 EN MON3 EN MON4 EN RSVD RSVD FETG ENABLE0 B9h HTXP EN LTXP EN BIAS HI EN BIAS MAX EN RSVD RSVD RSVD RSVD TX-F ENABLE1 BAh TEMP EN VCC EN MON1 EN MON2 EN MON3 EN MON4 EN RSVD RSVD TX-F ENABLE0 BBh HTXP EN LTXP EN BIAS HI EN BIAS MAX EN RSVD RSVD RSVD FETG EN HTXP BCh 27 26 25 24 23 22 21 20 LTXP BDh 27 26 25 24 23 22 21 20 HBIAS BEh 27 26 25 24 23 22 21 20 MAX IBIAS BFh 212 211 210 29 28 27 26 25 DPU C0h RSVD RSVD INV LOSI MUX LOSI D3 CNTL D2 CNTL D1 CNTL D0 CNTL RESERVED C1–C3h 0 0 0 0 0 0 0 0 DAC1 C4h 27 26 25 24 23 22 21 20 RESERVED C5–C6h 0 0 0 0 0 0 0 0 M4 LUT C7h RSVD RSVD RSVD RSVD RSVD RSVD DBL_SB UP_LOWB MAN IBIAS F8h RSVD RSVD 212 211 210 29 28 27 F9h 27 26 25 24 23 22 21 20 MAN_CNTL FAh RSVD RSVD RSVD RSVD RSVD RSVD RSVD MAN_CLK BIAS DAC FBh 0 0 212 211 210 29 28 27 FCh 27 26 25 24 23 22 21 20 RESERVED FD-FEh 0 0 0 0 0 0 0 0 We Want Your Feedback! Automatic Updates Would you like to be automatically notified when new application notes are published in your areas of interest? Sign up for EE-Mail™. More Information   APP 4110: Sep 27, 2007 DS1865 PON Triplexer Control and Monitoring Circuit Full Data Sheet (PDF, 532kB) Free Samples   Download, PDF Format (52kB)  AN4110, AN 4110, APP4110, Appnote4110, Appnote 4110