Abstract: There is a potential timing issue causing problems with the Ethernet receiver when a physical interface (PHY) such as the Intel® LXT972ALC is connected to the reset output (RSTOL) of the DS80C400. The solution is to not connect the reset line and perform a software reset of the PHY instead. This application note describes the code necessary to perform a software reset of the PHY.
There is a potential timing issue causing problems with the Ethernet receiver when a physical interface (PHY) such as the Intel LXT972ALC is connected to the reset output (RSTOL) of the DS80C400. The solution is to not connect the reset line but instead perform a software reset of the PHY. This application note describes the code necessary to perform a software reset of the PHY.
The IEEE® Standard 802.3 defines bit 15 in the MII control register (0.15) as the reset bit. The bit is self-clearing. Using the aforementioned library, a PHY can be reset with the following code:
mov b, #0 ; PHY number
mov a, #MII_CONTROL ; Control register
call ETH_ReadMII
orl 1, #80h ; Set reset bit (0.15) in r1
call ETH_WriteMII
reset_wait:
call ETH_ReadMII
mov a, r1
jb acc.7, reset_wait ; Loop while in reset
Equivalent code can be written for Java™ programs running on the TINI® Firmware 1.12 and later. com.dalsemi.tininet.TININet contains the readMII and writeMII methods:
import com.dalsemi.tininet.*;
...
int val = TININet.readMII(0, 0); /* PHY 0, register 0 */
val |= 0x8000; /* Set reset bit */
TININet.writeMII(0, 0, val); /* Perform reset */
do {
val = TININet.readMII(0, 0);
} while ((val & 0x8000) != 0);
IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers.
Intel is a registered trademark of Intel Corporation.
Java is a trademark of Sun Microsystems, Inc.
TINI is a registered trademark of Maxim Integrated Products, Inc.
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