Abstract: This discussion examines the design considerations, tradeoffs and a technique used to produce an equalization solution. The design technique suggests an alternative to developing complex models of the environment. Data are recorded from the target environment in the lab, replayed in the simulator, and altered by the circuit. Results from a working implementation are presented. This equalization approach is realized in a tiny chip-scale package that permits operating from 100Mbps to 6.4Gbps, uses less than 50mW, and is insensitive to coding. The application note you have requested is available in Acrobat PDF format: APPLICATION NOTE 1900: HFTA-06.0: Designing a Simple, Small, Wide-Band and Low-Power Equalizer for FR4 Copper Links (PDF, 855kB) A free Acrobat PDF reader is available from: http://www.adobe.com/products/acrobat/readstep.html Related Parts   APP 1900: Feb 27, 2003 MAX3785 6.25Gbps, 1.8V PC Board Equalizer Full Data Sheet (PDF, 372kB) Automatic Updates Would you like to be automatically notified when new application notes are published in your areas of interest? Sign up for EE-Mail™. We Want Your Feedback!   Download, PDF Format (855kB)  AN1900, AN 1900, APP1900, Appnote1900, Appnote 1900