Overview
The line interface unit (LIU) can be completely decoupled from the framer/formatter to interface to optical, HDSL, or other devices with an NRZ interface. It can then be used to corrupt data, insert framing errors, or insert CRC errors, etc.

The framer/formatter can generate/detect either bipolar or NRZ data format (determined by the ODF bit). Table 1 shows the register settings for the output data format. Figures 1 and 2 show how to interface the framer/formatter to devices with bipolar or NRZ data modes.

When the LIU receive side is interfaced to a device with NRZ data format, an OR-gate must be added to convert the bipolar data format into NRZ. See Figures 3 and 4 for both data mode applications.

Table 1. Output data format (ODF) regsiter settings

DS21352/552/Q352/Q552
CCR1: Common Control Register 1 (Address = 37 Hex)

TESE	ODF	RSAO	TSCLKM	RSCLKM	RESE	PLB	FLB	FUNCTION
X	0	X	X	X	X	X	X	Bipolar data
X	1	X	X	X	X	X	X	NRZ data

DS21354/554/Q354/Q554
TCR1: Transmit Control Register 1 (Address = 12 Hex)

ODF	TFPT	T16S	TUA1	TSiS	TSA1	TSM	TSIO	FUNCTION
0	X	X	X	X	X	X	X	Bipolar data
1	X	X	X	X	X	X	X	NRZ data

DS2155/56/Q55/Q56
IOCR1: I/O Configuration Register 1 (Address = 01 Hex)

RSMS	RSMS2	RSMS1	RSIO	TSDW	TSM	TSIO	ODF	FUNCTION
X	X	X	X	X	X	X	0	Bipolar data
X	X	X	X	X	X	X	1	NRZ data

The DS2155/56 provides a software control bit to separate or connect the LIU/framer when the LIUC pin is hardwired high. If the LIUC pin is connected low, then the LIUC bit has no effect (Table 2).

DS2155/56/Q55/Q56
LBCR: Loopback Control Register (Address = 4A Hex)

--	--	--	LIUC	LLB	RLB	PLB	FLB	FUNCTION
X	X	X	0	X	X	X	0	LIUC control

Table 2. LIU mux control

LIUC PIN	LIUC BIT	FUNCTION
0	0	LIU and framer separated
0	1	LIU and framer separated
1	0	LIU and framer connected
1	1	LIU and framer separated

Figure 1. Framer connection to bipolar mode device.


Figure 2. Framer connection to NRZ mode device.


Figure 3. LIU connection to bipolar device.


Figure 4. LIU connection to NRZ mode device.

Related Parts
DS21352	3.3V DS21352 and 5V DS21552 T1 Single Chip Transceivers
DS21354	3.3V/5V E1 Single Chip Transceivers (SCT)
DS2155	T1/E1/J1 Single-Chip Transceiver	Free Samples
DS21552	3.3V DS21352 and 5V DS21552 T1 Single Chip Transceivers
DS21554	3.3V/5V E1 Single Chip Transceivers (SCT)	Free Samples
DS2156	T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface	Free Samples
DS21Q352	Quad T1/E1 Transceiver (3.3V, 5.0V)
DS21Q354	Quad T1/E1 Transceiver (3.3V, 5.0V)
DS21Q55	Quad T1/E1/J1 Transceiver
DS21Q552	Quad T1/E1 Transceiver (3.3V, 5.0V)
DS21Q554	Quad T1/E1 Transceiver (3.3V, 5.0V)

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APP 391: Aug 30, 2002 APPLICATION NOTE 391, AN391, AN 391, APP391, Appnote391, Appnote 391